- (BDD) S. B. Akers, "Binary Decision Diagram," IEEE Trans. on Computers, Vol C-27, pp 509-516, 1978
- (OBDD) R. E. Bryant, "Graph-Based Algorithms for Boolean Function Manipulation," IEEE Trans. on Computers, pp. 677-691, 1986
- (RTPG Methodology) A. Aharon et. al., "Verification of IBM RISC System/6000 by a dynamic biased pseudo-random test program generator," IBM System Journal, Vol 30, No 4, pp 527-538, 1991
(RTPG Methodology) A. Chandra et. al., "AVPGEN - A Test Generator for Architecture Verification," IEEE Trans. on VLSI, Vol 3, No 2, pp. 188-200, 1995
(Logic/Fault Simulation) M. Abramovici et. al.,"Digital Systems Testing and Testable Design," Computer Science Press, 1990, Chapters 2-4
References for OBDD
- Beate Bollig and Ingo Wegener, "Improving the Variable Ordering of OBDDs Is NP-Complete," IEEE Trans. on Computers, 1996, Vol 45, No 9, 993-1001
- R. Rudell, "Dynamic Variable Ordering for Ordered Binary Decision Diagrams," IEEE ICCAD, 1993, pp. 42-47
- M. Fujita, et. al. "On Variable Ordering of Binary Decision Diagrams for the Application of Multi-Level Synthesis," Proc. European Design Automation Conference, 1991, pp. 50-54
- S-C Minato, et. at., "Shared Binary Decision Diagram with Attributed Edges for Efficient Boolean Function Manipulation," 27th ACM/IEEE DAC, 1990, pp. 52-57
- K. S. Brace et. al., "Efficient Implementation of a BDD Package," 27th ACM/IEEE DAC, 1990, pp. 40-45
- T. Yamada and H. Yasuura, "On the Computational Power of Binary Decision Diagram with Redundant Variables," Formal Methods in System Design, No 8, 1996, pp. 65-89